Datasheet

1013
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
40.7.14 DMAC Channel x [x = 0..7] Destination Address Register
Name: DMAC_DADDRx [x = 0..7]
Address: 0xFFFFEC40 [0], 0xFFFFEC68 [1], 0xFFFFEC90 [2], 0xFFFFECB8 [3], 0xFFFFECE0 [4], 0xFFFFED08 [5],
0xFFFFED30 [6], 0xFFFFED58 [7]
Access: Read/Write
• DADDRx
Channel x destination address. This register must be aligned with the destination transfer width.
31 30 29 28 27 26 25 24
DADDRx
23 22 21 20 19 18 17 16
DADDRx
15 14 13 12 11 10 9 8
DADDRx
76543210
DADDRx