Datasheet

1009
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
40.7.10 DMAC Channel Handler Enable Register
Name: DMAC_CHER
Address: 0xFFFFEC28
Access: Write-only
• ENA[7:0]
When set, a bit of the ENA field enables the relevant channel.
• SUSP[7:0]
When set, a bit of the SUSPfield freezes the relevant channel and its current context.
• KEEP[7:0]
When set, a bit of the KEEP field resumes the current channel from an automatic stall state.
31 30 29 28 27 26 25 24
KEEP7 KEEP6 KEEP5 KEEP4 KEEP3 KEEP2 KEEP1 KEEP0
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
SUSP7 SUSP6 SUSP5 SUSP4 SUSP3 SUSP2 SUSP1 SUSP0
76543210
ENA7 ENA6 ENA5 ENA4 ENA3 ENA2 ENA1 ENA0