Datasheet
SAM9G20
DS60001516A-page 8 2017 Microchip Technology Inc.
RF SSC Receive Frame Sync I/O –
Timer/Counter - TCx
TCLKx TC Channel x External Clock Input Input –
TIOAx TC Channel x I/O Line A I/O –
TIOBx TC Channel x I/O Line B I/O –
Serial Peripheral Interface - SPIx
SPIx_MISO Master In Slave Out I/O –
SPIx_MOSI Master Out Slave In I/O –
SPIx_SPCK SPI Serial Clock I/O –
SPIx_NPCS0 SPI Peripheral Chip Select 0 I/O Low
SPIx_NPCS1–SPIx_NPCS3 SPI Peripheral Chip Select Output Low
Two-Wire Interface - TWI
TWD Two-wire Serial Data I/O –
TWCK Two-wire Serial Clock I/O –
USB Host Port - UHP
HDPA USB Host Port A Data + Analog –
HDMA USB Host Port A Data - Analog –
HDPB USB Host Port B Data + Analog –
HDMB USB Host Port B Data - Analog –
USB Device Port - UDP
DDM USB Device Port Data - Analog –
DDP USB Device Port Data + Analog –
Ethernet MAC 10/100 - EMAC
ETXCK Transmit Clock or Reference Clock Input – MII only, REFCK in RMII
ERXCK Receive Clock Input – MII only
ETXEN Transmit Enable Output –
ETX0–ETX3 Transmit Data Output – ETX0–ETX1 only in RMII
ETXER Transmit Coding Error Output – MII only
ERXDV Receive Data Valid Input – RXDV in MII, CRSDV in RMII
ERX0–ERX3 Receive Data Input – ERX0–ERX1 only in RMII
ERXER Receive Error Input –
ECRS Carrier Sense and Data Valid Input – MII only
ECOL Collision Detect Input – MII only
EMDC Management Data Clock Output –
EMDIO Management Data Input/Output I/O –
Table 2-1: Signal Description List
Signal Name Function Type Active Level Comments