Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 791
SAM9G20
Doc. Rev
6384E
Comments
Change
Request
Ref.
Product Overview:
Section 4. “Power Considerations”, Removed the section “Power Consumption”.
Section 5. “I/O Line Considerations”, Removed the section “Slow Clock Selection”.
6945
Boot Progam:
Section 12.1 “Overview”, 2nd sentence of 6th paragraph updated...”formatted SDCard on SlotA”. 6243
CKGR:
Section 24.5.1 “Divider and Phase Lock Loop Programming”, removed and replaced last line with reference
to PLL Characteristics in Product Electrical Characteristics section.
PMC:
Section 25.9.16 “PMC Interrupt Mask Register”, PCKRDYx bitfield description functional sense of values 0
and 1, reversed.
6666/6870
6311
SHDWC:
Section 17.6.3 “Shutdown Status Register”, bitfield 16 contains RTTWK. 6583
SMC:
Table 20-8, “Register Mapping”, SMC_CYCLE reset is 0x00030003.
Table 20.8.6, “Reset Values of Timing Parameters”, replace redundant Table 21-5 with ref. to Table 21-8.
6742
Electrical Characteristics:
“SPI”, Figure 40-8, Figure 40-9, Figure 40-10, Figure 40-11, titles to SPI timing diagrams simplified.
Table 40-2, “DC Characteristics”, I
SC
values updated.
Table 40-2, “DC Characteristics”, I
IN
3.3V I/O Input leakage current row added.
Table 40.10.1, “Power-up Sequence”, updated the sentence; ”VDDIO must be established first (>0.7V)...”
Table 40-7, “XIN Clock Electrical Characteristics”, V
IN
row, Min Max cells updated.
6872
6905
6605
6443
6595
Table 40-11, “32 kHz Crystal Characteristics”, motional capacitance units are fF not pF. 6708
Table 40-16, “PLLA Characteristics”, added; T, Startup Time row.
Table 40-18, “PLLB Characteristics”, added; T, Startup Time row.
6673
ERRATA:
Section 44.1 “SAM9G20 Errata - Revision A Parts”,
Section 44.1.5.1 “RSTC: Reset During SDRAM Accesses”, updated.
Section 44.2 “SAM9G20 Errata - Revision B Parts”,
Section 44.2.5.1 “RSTC: Reset During SDRAM Accesses”, updated.
6728