Datasheet

SAM9G20
DS60001516A-page 788  2017 Microchip Technology Inc.
Doc. Rev.
6384F Comments
09-Nov-15
In document title, “Thumb Microcontrollers” changed to “Embedded MPU”
Product name AT91SAM9G20 updated to SAM9G20
General editorial and formatting changes throughout
Section “Description”
Updated text
Section “Features”
In package information, “RoHS-compliant” updated to “Green-compliant”
Section 1. “Block Diagram”
Figure 1-1: “SAM9G20 Block Diagram”:
- minor update in System Controller and backup area
- signal range “SCK0–SCK2” corrected to “SCK0–SCK3”
Section 2. “Signal Description”
At end of section, deleted note “No PLLRCA line present on the AT91SAM9G20.”
Section 3. “Package and Pinout”
Updated first sentence
Section 4. “Power Considerations”
Updated Section 4.1 “Power Supplies”
Added Section 4.3 “Power Sequence Requirements”
Updated Section 4.3.1 “Power-up Sequence”
Section 7. “Memories”
Figure 7-1: “SAM9G20 Memory Mapping”: two blocks “MATRIX” and “CCFG” replaced by single “MATRIX” block
Section 8. “System Controller”
Section 8.3 “Shutdown Controller”: “SHWDN pin” corrected to “SHDN pin”
Section 11. “Debug and Test”
Updated Figure 11-2: “Application Debug and Trace Environment Example”
Section 12. “Boot Program”
Section 12.5 “Serial Flash Boot”: in second paragraph, “SPCK at 8 MHz” corrected to “SPCK at 1 MHz”
Section 12.6 “DataFlash Boot Sequence”: in second paragraph, “SPCK at 8 MHz” corrected to “SPCK at 1 MHz”
Section 12.7 “NAND Flash Boot”: updated first paragraph to specify first block must be guaranteed
Section 12.8 “SDCard Boot”: added note “The bootable SDCard slot is Slot A.”
Section 12.10.3 “USB Device Port”: removed reference to “Windows XP”
Section 18. “SAM9G20 Bus Matrix”
Section 18.5.4 “Bus Matrix Master Remap Control Register”: deleted reset value line
Section 18.6.1 “EBI Chip Select Assignment Register”: deleted reset value line; updated IOSR bit description
Section 19. “SAM9G20 External Bus Interface”
Section 19.6.6.2 “CFCE1 and CFCE2 Signals”: updated text