Datasheet

SAM9G20
DS60001516A-page 786 2017 Microchip Technology Inc.
44.2.13.2 USART: DCD is Active High instead of Low
The DCD signal is active at High level in the USART Modem Mode .
DCD should be active at Low level.
Problem Fix/Workaround
Add an inverter.
44.2.14 Power Management Controller (PMC)
44.2.14.1 PMC: PMC bad frequency after MDIV switching
If MDIV and another field (CSS or PRES) are changed at the same, the clock frequency may not be correct.
Problem Fix/Workaround
For each clock switching, the user must take care to:
change fields CSS, MDIV, PRES one by one
wait MCKRDY bit setting in PMC_SR before changing PMC_MCKR
ensure each transitory frequency value is in operational range for PCK and MCK
44.2.15 External Bus Interface (EBI)
44.2.15.1 EBI: After reset A25 is not functionnal
After reset of the SAM9G20 device the PC10/A25 line is set into general purpose (GPIO) mode and not in peripheral mode.
This result to prevent any access to upper memory address range (0xD0000000) as the A25 EBI line is not functionnal.
Problem Fix/Workaround
According to your system memory mapping, set into your low level initialization the PC10 line in peripheral A mode.