Datasheet

SAM9G20
DS60001516A-page 782  2017 Microchip Technology Inc.
Problem Fix/Workaround
1. Avoid User Reset to generate a system reset.
2. Trap the User Reset with an interrupt.
In the interrupt routine, Power Down SDRAM properly and perform Peripheral and Processor Reset with software in assembler.
Example with libV3.
• The main code:
//user reset interrupt setting
// Configure AIC controller to handle SSC interrupts
AT91F_AIC_ConfigureIt (
AT91C_BASE_AIC, // AIC base address
AT91C_ID_SYS, // System peripheral ID
AT91C_AIC_PRIOR_HIGHEST, // Max priority
AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED, // Level sensitive
sysc_handler );
// Enable SYSC interrupt in AIC
AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_SYS);
*AT91C_RSTC_RMR = (0xA5<<24) | (0x4<<8) | AT91C_RSTC_URSTIEN;
• The C SYS handler:
extern void soft_user_reset(void);
void sysc_handler(void){
//check if interrupt comes from RSTC
if( (*AT91C_RSTC_RSR & AT91C_RSTC_URSTS ) == AT91C_RSTC_URSTS){
soft_user_reset();
//never reached
while(1);
}
}
• Assembly code is mandatory for the following sequence as Arm instructions need to be pipelined.
The assembler routine:
AREA TEST, CODE
INCLUDE AT91SAM9xxx.inc
EXPORTsoft_user_reset
soft_user_reset
;disable IRQs
MRS r0, CPSR
ORR r0, r0, #0x80
MSR CPSR_c, r0
;change refresh rate to block all data accesses
LDR r0, =AT91C_SDRAMC_TR
LDR r1, =1
STR r1, [r0]
;prepare power down command
LDR r0, =AT91C_SDRAMC_LPR
LDR r1, =2
;prepare proc_reset and periph_reset
LDR r2, =AT91C_RSTC_RCR
LDR r3, =0xA5000005