Datasheet

SAM9G20
DS60001516A-page 764  2017 Microchip Technology Inc.
Note 1: Timings SSC
14
and SSC
15
also apply when RK is used instead of TK (SSC_TCMR.CKS = RK).
Note 1: Timings SSC
14
and SSC
15
also apply when RK is used instead of TK (SSC_TCMR.CKS = RK).
SSC
11
RF/RD setup time before RK edge (RK output) 15.9 - t
CPMCK
–ns
SSC
12
RF/RD hold time after RK edge (RK output) t
CPMCK
- 6.5 – ns
SSC
13
RK edge to RF (RK output) -2.8 – ns
SSC
14
(1)
TK rise time or fall time 10 to 90% – 10 ns
SSC
15
(1)
TK low or high time
V
TK
>V
IH
or
V
TK
<V
IL
3.4 + (3 x t
CPMCK
)–ns
Table 40-42: SSC Timings 1.8V Domain
Symbol Parameter Conditions Min Max Unit
Transmitter
SSC
0
TK edge to TF/TD (TK output, TF output) -3.2 4.2
(1)
ns
SSC
1
TK edge to TF/TD (TK input, TF output) -3.2
(1)
4.2
(1)
ns
SSC
2
TF setup time before TK edge (TK output) 21.2 - t
CPMCK
–ns
SSC
3
TF hold time after TK edge (TK output) t
CPMCK
- 13.4 – ns
SSC
4
TK edge to TF/TD (TK output, TF input)
-3.1
(1)
4.3
(1)
ns
STTDLY = 0
START = 4, 5 or 7
-3.1 + (2 × t
CPMCK
)
(1)
4.3 + (2 × t
CPMCK
)
(1)
SSC
5
TF setup time before TK edge (TK input) 7.4 - t
CPMCK
–ns
SSC
6
TF hold time after TK edge (TK input) t
CPMCK
- 0.7 – ns
SSC
7
TK edge to TF/TD (TK input, TF input)
11.6 17.0
ns
STTDLY = 0
START = 4, 5 or 7
11.6 + (3 × t
CPMCK
)17.0 + (3 × t
CPMCK
)
Receiver
SSC
8
RF/RD setup time before RK edge (RK input) 7.4 - t
CPMCK
–ns
SSC
9
RF/RD hold time after RK edge (RK input) t
CPMCK
+ 7.4 – ns
SSC
10
RK edge to RF (RK input) 11.3 22.3 ns
SSC
11
RF/RD setup time before RK edge (RK output) 21.6 - t
CPMCK
–ns
SSC
12
RF/RD hold time after RK edge (RK output) t
CPMCK
- 10.5 – ns
SSC
13
RK edge to RF (RK output) -3.2 – ns
SSC
14
(1)
TK rise time or fall time 10 to 90% – 10 ns
SSC
15
(1)
TK low or high time
V
TK
>V
IH
or
V
TK
<V
IL
3.6 + (3 x t
CPMCK
)–ns
Table 40-41: SSC Timings 3.3V Domain (Continued)
Symbol Parameter Conditions Min Max Unit