Datasheet

SAM9G20
DS60001516A-page 758 2017 Microchip Technology Inc.
Slave Write Mode
For 3.3V I/O domain and SPI6, f
SPCK
Max = 18.7 MHz. t
su
is the setup time from the master before sampling data.
40.12.2.2 SPI Timings
SPI timings are given assuming a capacitance load on MISO, SPCK and MOSI as defined in Table 40-38.
Figure 40-8: SPI Master Mode 1 and 2
Figure 40-9: SPI Master Mode 0 and3
Table 40-38: Capacitance Load for MISO, SPCK and MOSI
Supply
Corner
Max
1.8V/3.3V 20 pF
f
SPCK
Max
1
2xS( PI
6max
orSPI
9max
()t
su
)+
------------------------------------------------------------------------------
=
SPCK
MISO
MOSI
SPI
2
SPI
0
SPI
1
SPCK
MISO
MOSI
SPI
5
SPI
3
SPI
4