Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 755
SAM9G20
40.12 Peripheral Timings
40.12.1 EMAC
Timings are given assuming a capacitance load on data and clock as defined in Table 40-34.
The Ethernet controller satisfies the timings of standard in Max corner.
40.12.1.1 MII Mode
Note 1: VDDIO from 3.0V to 3.6V, maximum external capacitor = 20 pF
Table 40-34: Capacitance Load on Data, Clock Pads
I/O Supply
Corner
Max
3.3V 20 pF
1.8V 20 pF
Table 40-35: EMAC Signals Relative to EMDC
Symbol Parameter Min (ns) Max (ns)
EMAC
1
Setup for EMDIO from EMDC rising 10 –
EMAC
2
Hold for EMDIO from EMDC rising 10 –
EMAC
3
EMDIO toggling from EMDC rising 0 300
Table 40-36: EMAC MII Specific Signals
Symbol Parameter Min (ns) Max (ns)
EMAC
4
Setup for ECOL from ETXCK rising 10 –
EMAC
5
Hold for ECOL from ETXCK rising 10 –
EMAC
6
Setup for ECRS from ETXCK rising 10 –
EMAC
7
Hold for ECRS from ETXCK rising 10 –
EMAC
8
ETXER toggling from ETXCK rising 10 25
EMAC
9
ETXEN toggling from ETXCK rising 10 25
EMAC
10
ETX toggling from ETXCK rising 10 25
EMAC
11
Setup for ERX from ERXCK 10 –
EMAC
12
Hold for ERX from ERXCK 10 –
EMAC
13
Setup for ERXER from ERXCK 10 –
EMAC
14
Hold for ERXER from ERXCK 10 –
EMAC
15
Setup for ERXDV from ERXCK 10 –
EMAC
16
Hold for ERXDV from ERXCK 10 –