Datasheet

SAM9G20
DS60001516A-page 748  2017 Microchip Technology Inc.
40.7 ADC Characteristics
Note 1: In worst case, the Track-and-Hold Acquisition Time is given by:
In case of very high input impedance, this value must be respected in order to guarantee the correct converted value. An inter-
nal input current buffer supplies the current required for the low input impedance (1 mA max)
.
To achieve optimal performance of the ADC, the analog power supply VDDANA and the ADVREF input voltage must be decoupled with
a 4.7 µF capacitor in parallel with a 100 nF capacitor
.
Table 40-20: ADC Characteristics 9-bit Mode
Code Parameter Condition & Notes Min Typ Max Unit
R Resolution – 9 – Bits
INL Integral Non-linearity – – ±2 LSB
DNL Differential Non-linearity No missing code -1 – +2 LSB
E
O
Offset Error Not including V
REF
N error – – ±3 LSB
E
G
Gain Error -1.5 – 3.5 LSB
f
CLK
Clock Frequency No missing code – – 5 MHz
Conversion Rate:
Conversion Time Clock Frequency = 5 MHz 2 µs
Track-and-Hold Acquisition Time see Note
(1)
500 ns
Throughput Rate @ f
CLK
= 5 MHz with TTH = 1 µs 330 ksps
Table 40-21: ADC Characteristics 10-bit Mode
Code Parameter Condition & Notes Min Typ Max Unit
R Resolution – 10 – Bits
INL Integral Non-linearity – – ±2 LSB
DNL Differential Non-linearity No missing code -1 – ±1 LSB
E
O
Offset Error Not including V
REF
N error – ±3 LSB
E
G
Gain Error -1.5 – 3.5 LSB
f
CLK
Clock Frequency No missing code – – 1 MHz
Conversion Rate:
Conversion Time Clock Frequency = 5 MHz 10 µs
Track-and-Hold Acquisition Time see Note
(1)
500 ns
Throughput Rate @ f
CLK
= 5 MHz with TTH = 1 µs 95 ksps
TTH (µs) 1.2 0.09 Z
IN
×()kOhm()+=