Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 747
SAM9G20
Following configuration of ICPLLA and OUTA must be done for each PLLA frequency range.
40.6 I/O Characteristics
Criteria used to define the maximum frequency of the I/Os:
• Output duty cycle (40%–60%)
• Minimum output swing: 100 mV to VDDIO - 100 mV
• Addition of rising and falling time inferior to 75% of the period
Note 1: V
VDDIOP
from 3.0V to 3.6V
2: V
VDDIOP
from 1.65V to 1.95V
Table 40-17: PLLA Frequency Regarding ICPLLA and OUTA
PLL Frequency Range (MHz) ICPLLA OUTA
745–800 0 0 0
695–750 0 0 1
645–700 0 1 0
595–650 0 1 1
545–600 1 0 0
495–550 1 0 1
445–500 1 1 0
400–450 1 1 1
Table 40-18: PLLB Characteristics
Symbol Parameter Conditions Min Typ Max Unit
f
OUT
Output Frequency Field CKGR_PLL.OUT = 00 30 – 100 MHz
f
in
Input Frequency 2 – 32 MHz
I
PLL
Current Consumption
Active mode @ 100 MHz – – 1.2 mA
Standby mode – – 1 µA
t
START
Startup Time – – 100 µs
Table 40-19: I/O Characteristics
Symbol Parameter Conditions Min Max Unit
FreqMax VDDIOP powered pins frequency
3.3V domain
(1)
Max. external load = 20 pF – 66 MHz
Max. external load = 40 pF – 66 MHz
1.8V domain
(2)
Max. external load = 20 pF – 66 MHz
Max. external load = 40 pF – 66 MHz