Datasheet

SAM9G20
DS60001516A-page 742  2017 Microchip Technology Inc.
40.4.3 XIN Clock Characteristics
40.4.4 I/O Slew Rates
The IOSR and VDDIOMSEL bits in the EBI_CSA register allow the user to program the rising and falling times of SDRAM signals. Rising/
Falling time is given between 30% and 70%.
Table 40-7: XIN Clock Electrical Characteristics
Symbol Parameter Conditions Min Max Unit
1/
(t
CPXIN
)
XIN Clock Frequency – 50 MHz
t
CPXIN
XIN Clock Period 20 – ns
t
CHXIN
XIN Clock High Half-period
0.4 ×
t
CPXIN
0.6 ×
t
CPXIN
ns
t
CLXIN
XIN Clock Low Half-period
0.4 ×
t
CPXIN
0.6 ×
t
CPXIN
ns
C
IN
XIN Input Capacitance
Main Oscillator in Bypass mode (i.e., when
MOSCEN = 0 and OSCBYPASS = 1 in the
CKGR_MOR). See “PMC Clock Generator
Main Oscillator Register”.
–25pF
R
IN
XIN Pull-down Resistor – 1000 kΩ
V
IN
XIN Voltage V
DDOSC
V
DDOSC
V
Table 40-8: SDRAM Clock
VDDIOMSEL IOSR Conditions
Rising time
(ns)
Falling time
(ns)
0 0 1.8V range, FAST slew rate, C
LOAD
= 10 pF 0.8 1.0
0 1 1.8V range, SLOW slew rate, C
LOAD
= 10 pF 1.6 1.5
1 0 3.3V range, FAST slew rate, C
LOAD
= 10 pF 0.8 0.8
1 1 3.3V range, SLOW slew rate, C
LOAD
= 10 pF 1.5 1.6
Table 40-9: SDRAM Data, Address and Control
VDDIOMSEL IOSR Conditions
Rising time
(ns)
Falling time
(ns)
0 0 1.8V range, FAST slew rate, C
LOAD
= 30 pF 1.5 1.5
0 1 1.8V range, SLOW slew rate, C
LOAD
= 30 pF 1.7 1.8
1 0 3.3V range, FAST slew rate, C
LOAD
= 50 pF 2.8 3.1
1 1 3.3V range, SLOW slew rate, C
LOAD
= 50 pF 6.0 5.7