Datasheet

SAM9G20
DS60001516A-page 720  2017 Microchip Technology Inc.
39. Analog-to-Digital Converter (ADC)
39.1 Overview
The ADC is based on a Successive Approximation Register (SAR) 10-bit Analog-to-Digital Converter (ADC). It also integrates a 4-to-1
analog multiplexer, making possible the analog-to-digital conversions of 4 analog lines. The conversions extend from 0V to ADVREF.
The ADC supports an 8-bit or 10-bit resolution mode, and conversion results are reported in a common register for all channels, as well
as in a channel-dedicated register. Software trigger, external trigger on rising edge of the ADTRG pin or internal triggers from Timer Coun-
ter output(s) are configurable.
The ADC also integrates a Sleep Mode and a conversion sequencer and connects with a PDC channel. These features reduce both power
consumption and processor intervention.
Finally, the user can configure ADC timings, such as Startup Time and Sample & Hold Time.
39.2 Block Diagram
Figure 39-1: Analog-to-Digital Converter Block Diagram
ADC Interrupt
ADC
ADTRG
VDDANA
ADVREF
GND
Trigger
Selection
Control
Logic
Successive
Approximation
Register
Analog-to-Digital
Converter
Timer
Counter
Channels
User
Interface
AIC
Peripheral Bridge
APB
PDC
ASB
Dedicated
Analog
Inputs
Analog Inputs
Multiplexed
with I/O lines
AD-
AD-
AD-
PIO
AD-
AD-
AD-