Datasheet
SAM9G20
DS60001516A-page 664 2017 Microchip Technology Inc.
Figure 36-6: Data IN Transfer for Non Ping-pong Endpoint
• Using Endpoints With Ping-pong Attribute
The use of an endpoint with ping-pong attributes is necessary during isochronous transfer. This also allows handling the maximum band-
width defined in the USB specification during bulk transfer. To be able to guarantee a constant or the maximum bandwidth, the microcon-
troller must prepare the next data payload to be sent while the current one is being sent by the USB device. Thus two banks of memory
are used. While one is available for the microcontroller, the other one is locked by the USB device.
Figure 36-7: Bank Swapping Data IN Transfer for Ping-pong Endpoints
When using a ping-pong endpoint, the following procedures are required to perform Data IN transactions:
1. The microcontroller checks if it is possible to write in the FIFO by polling TXPKTRDY to be cleared in the endpoint’s UDP_CSRx
register.
2. The microcontroller writes the first data payload to be sent in the FIFO (Bank 0), writing zero or more byte values in the endpoint’s
UDP_FDRx register.
3. The microcontroller notifies the USB peripheral it has finished writing in Bank 0 of the FIFO by setting the TXPKTRDY in the end-
point’s UDP_CSRx register.
4. Without waiting for TXPKTRDY to be cleared, the microcontroller writes the second data payload to be sent in the FIFO (Bank 1),
USB Bus Packets
Data IN 2
Data IN NAK
ACK
Data IN 1
FIFO (DPR)
Content
Data IN 2Load In ProgressData IN 1
Cleared by Firmware
DPR access by the firmware
Payload in FIFO
TXCOMP Flag
(UDP_CSRx)
TXPKTRDY Flag
(UDP_CSRx)
PID
Data IN Data IN
PIDPID PIDPID
ACK
PID
Prevous Data IN TX Microcontroller Load Data in FIFO Data is Sent on USB Bus
Interrupt
Pending
Interrupt Pending
Set by the firmware
Set by the firmware
Cleared by
Firmware
Cleared b
y Hw
Cle
ared by Hw
DPR access by the hardware
USB Device USB Bus
Read
Write
Read and Write at the Same Time
1
st
Data Payload
2
nd
Data Payload
3
rd
Data Payload
3
rd
Data Payload
2
nd
Data Payload
1
st
Data Payload
Data IN Packet
Data IN Packet
Data IN Packet
Microcontroller
Endpoint 1
Bank 0
Endpoint 1
Bank 1
Endpoint 1
Bank 0
Endpoint 1
Bank 0
Endpoint 1
Bank 0
Endpoint 1
Bank 1