Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 603
SAM9G20
The transmit buffer queue pointer register must not be written while transmit is active. If a new value is written to the transmit buffer queue
pointer register, the queue pointer resets itself to point to the beginning of the new queue. If transmit is disabled by writing to bit 3 of the
network control, the transmit buffer queue pointer register resets to point to the beginning of the transmit queue. Note that disabling receive
does not have the same effect on the receive queue pointer.
Once the transmit queue is initialized, transmit is activated by writing to bit 9, the Transmit Start bit of the network control register. Transmit
is halted when a buffer descriptor with its used bit set is read, or if a transmit error occurs, or by writing to the transmit halt bit of the network
control register. (Transmission is suspended if a pause frame is received while the pause enable bit is set in the network configuration
register.) Rewriting the start bit while transmission is active is allowed.
Transmission control is implemented with a Tx_go variable which is readable in the transmit status register at bit location 3. The Tx_go
variable is reset when:
- transmit is disabled
- a buffer descriptor with its ownership bit set is read
- a new value is written to the transmit buffer queue pointer register
- bit 10, tx_halt, of the network control register is written
- there is a transmit error such as too many retries or a transmit underrun.
To set tx_go, write to bit 9, tx_start, of the network control register. Transmit halt does not take effect until any ongoing transmit finishes.
If a collision occurs during transmission of a multi-buffer frame, transmission automatically restarts from the first buffer of the frame. If a
“used” bit is read midway through transmission of a multi-buffer frame, this is treated as a transmit error. Transmission stops, tx_er is
asserted and the FCS is bad.
If transmission stops due to a transmit error, the transmit queue pointer resets to point to the beginning of the transmit queue. Software
needs to re-initialize the transmit queue after a transmit error.
If transmission stops due to a “used” bit being read at the start of the frame, the transmission queue pointer is not reset and transmit starts
from the same transmit buffer descriptor when the transmit start bit is written.
Table 35-2: Transmit Buffer Descriptor Entry
Bit Function
Word 0
31:0 Byte Address of buffer
Word 1
31
Used. Needs to be zero for the EMAC to read data from the transmit buffer. The EMAC sets this to one for the first buffer of
a frame once it has been successfully transmitted.
Software has to clear this bit before the buffer can be used again.
Note: This bit is only set for the first buffer in a frame unlike receive where all buffers have the Used bit set once used.
30 Wrap. Marks last descriptor in transmit buffer descriptor list.
29 Retry limit exceeded, transmit error detected
28
Transmit underrun, occurs either when hresp is not OK (bus error) or the transmit data could not be fetched in time or when
buffers are exhausted in mid frame.
27 Buffers exhausted in mid frame
26:17 Reserved
16 No CRC. When set, no CRC is appended to the current frame. This bit only needs to be set for the last buffer of a frame.
15 Last buffer. When set, this bit indicates the last buffer in the current frame has been reached.
14:11 Reserved
10:0 Length of buffer