Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 599
SAM9G20
35. Ethernet MAC 10/100 (EMAC)
35.1 Overview
The EMAC module implements a 10/100 Ethernet MAC compatible with the IEEE 802.3 standard using an address checker, statistics and
control registers, receive and transmit blocks, and a DMA interface.
The address checker recognizes four specific 48-bit addresses and contains a 64-bit hash register for matching multicast and unicast
addresses. It can recognize the broadcast address of all ones, copy all frames, and act on an external address match signal.
The statistics register block contains registers for counting various types of event associated with transmit and receive operations. These
registers, along with the status words stored in the receive buffer list, enable software to generate network management statistics com-
patible with IEEE 802.3.
35.2 Block Diagram
Figure 35-1: EMAC Block Diagram
APB
Slave
Register Interface
DMA Interface
Address Checker
Statistics Registers
Control Registers
Ethernet Receive
Ethernet Transmit
MDIO
MII/RMII
RX FIFO
TX FIFO
AHB
Master