Datasheet

SAM9G20
DS60001516A-page 596  2017 Microchip Technology Inc.
34.9.12 MCI Interrupt Enable Register
Name: MCI_IER
Access: Write-only
CMDRDY: Command Ready Interrupt Enable
RXRDY: Receiver Ready Interrupt Enable
TXRDY: Transmit Ready Interrupt Enable
BLKE: Data Block Ended Interrupt Enable
DTIP: Data Transfer in Progress Interrupt Enable
NOTBUSY: Data Not Busy Interrupt Enable
ENDRX: End of Receive Buffer Interrupt Enable
ENDTX: End of Transmit Buffer Interrupt Enable
SDIOIRQA: SDIO Interrupt for Slot A Interrupt Enable
SDIOIRQB: SDIO Interrupt for Slot B Interrupt Enable
RXBUFF: Receive Buffer Full Interrupt Enable
TXBUFE: Transmit Buffer Empty Interrupt Enable
RINDE: Response Index Error Interrupt Enable
RDIRE: Response Direction Error Interrupt Enable
RCRCE: Response CRC Error Interrupt Enable
RENDE: Response End Bit Error Interrupt Enable
RTOE: Response Time-out Error Interrupt Enable
DCRCE: Data CRC Error Interrupt Enable
DTOE: Data Time-out Error Interrupt Enable
OVRE: Overrun Interrupt Enable
UNRE: UnderRun Interrupt Enable
0: No effect.
1: Enables the corresponding interrupt.
31 30 29 28 27 26 25 24
UNREOVRE––––––
23 22 21 20 19 18 17 16
– DTOE DCRCE RTOE RENDE RCRCE RDIRE RINDE
15 14 13 12 11 10 9 8
TXBUFE RXBUFF – – - - SDIOIRQB SDIOIRQA
76543210
ENDTX ENDRX NOTBUSY DTIP BLKE TXRDY RXRDY CMDRDY