Datasheet

SAM9G20
DS60001516A-page 576  2017 Microchip Technology Inc.
34.7.4 Write Operation
In write operation, the MCI Mode Register (MCI_MR) is used to define the padding value when writing non-multiple block size. If the bit
PDCPADV is 0, then 0x00 value is used when padding data, otherwise 0xFF is used.
If set, the bit PDCMODE enables PDC transfer.
The following flowchart shows how to write a single block with or without use of PDC facilities (see Figure 34-11). Polling or interrupt
method can be used to wait for the end of write according to the contents of the Interrupt Mask Register (MCI_IMR).