Datasheet

SAM9G20
DS60001516A-page 538  2017 Microchip Technology Inc.
33.5.4 Clock Control
The clock of each counter can be controlled in two different ways: it can be enabled/disabled and started/stopped. See Figure 33-4.
• The clock can be enabled or disabled by the user with the CLKEN and the CLKDIS commands in the Control Register. In Capture
Mode it can be disabled by an RB load event if LDBDIS is set to 1 in TC_CMR. In Waveform Mode, it can be disabled by an RC
Compare event if CPCDIS is set to 1 in TC_CMR. When disabled, the start or the stop actions have no effect: only a CLKEN com-
mand in the Control Register can re-enable the clock. When the clock is enabled, the CLKSTA bit is set in the Status Register.
• The clock can also be started or stopped: a trigger (software, synchro, external or compare) always starts the clock. The clock can
be stopped by an RB load event in Capture Mode (LDBSTOP = 1 in TC_CMR) or a RC compare event in Waveform Mode (CPCS-
TOP = 1 in TC_CMR). The start and the stop commands have effect only if the clock is enabled.
Figure 33-4: Clock Control
33.5.5 TC Operating Modes
Each channel can independently operate in two different modes:
• Capture Mode provides measurement on signals.
• Waveform Mode provides wave generation.
The TC Operating Mode is programmed with the WAVE bit in the TC Channel Mode Register.
In Capture Mode, TIOA and TIOB are configured as inputs.
In Waveform Mode, TIOA is always configured to be an output and TIOB is an output if it is not selected to be the external trigger.
33.5.6 Trigger
A trigger resets the counter and starts the counter clock. Three types of triggers are common to both modes, and a fourth external trigger
is available to each mode.
The following triggers are common to both modes:
• Software Trigger: Each channel has a software trigger, available by setting SWTRG in TC_CCR.
• SYNC: Each channel has a synchronization signal SYNC. When asserted, this signal has the same effect as a software trigger. The
SYNC signals of all channels are asserted simultaneously by writing TC_BCR (Block Control) with SYNC set.
• Compare RC Trigger: RC is implemented in each channel and can provide a trigger when the counter value matches the RC value if
CPCTRG is set in TC_CMR.
The channel can also be configured to have an external trigger. In Capture Mode, the external trigger signal can be selected between
TIOA and TIOB. In Waveform Mode, an external event can be programmed on one of the following signals: TIOB, XC0, XC1 or XC2. This
external event can then be programmed to perform a trigger by setting ENETRG in TC_CMR.
If an external trigger is used, the duration of the pulses must be longer than the master clock period in order to be detected.
QS
R
S
R
Q
CLKSTA CLKEN CLKDIS
Stop
Event
Disable
Event
Counter
Clock
Selected
Clock
Trigger