Datasheet

SAM9G20
DS60001516A-page 532  2017 Microchip Technology Inc.
32.8.16 SSC Interrupt Mask Register
Name:SSC_IMR
Access:Read-only
TXRDY: Transmit Ready Interrupt Mask
0: The Transmit Ready Interrupt is disabled.
1: The Transmit Ready Interrupt is enabled.
TXEMPTY: Transmit Empty Interrupt Mask
0: The Transmit Empty Interrupt is disabled.
1: The Transmit Empty Interrupt is enabled.
ENDTX: End of Transmission Interrupt Mask
0: The End of Transmission Interrupt is disabled.
1: The End of Transmission Interrupt is enabled.
TXBUFE: Transmit Buffer Empty Interrupt Mask
0: The Transmit Buffer Empty Interrupt is disabled.
1: The Transmit Buffer Empty Interrupt is enabled.
RXRDY: Receive Ready Interrupt Mask
0: The Receive Ready Interrupt is disabled.
1: The Receive Ready Interrupt is enabled.
OVRUN: Receive Overrun Interrupt Mask
0: The Receive Overrun Interrupt is disabled.
1: The Receive Overrun Interrupt is enabled.
ENDRX: End of Reception Interrupt Mask
0: The End of Reception Interrupt is disabled.
1: The End of Reception Interrupt is enabled.
RXBUFF: Receive Buffer Full Interrupt Mask
0: The Receive Buffer Full Interrupt is disabled.
1: The Receive Buffer Full Interrupt is enabled.
CP0: Compare 0 Interrupt Mask
0: The Compare 0 Interrupt is disabled.
1: The Compare 0 Interrupt is enabled.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
––––RXSYNTXSYN CP1 CP0
76543210
RXBUF ENDRX OVRUN RXRDY TXBUFE ENDTX TXEMPTY TXRDY