Datasheet

SAM9G20
DS60001516A-page 508  2017 Microchip Technology Inc.
Figure 32-18: Codec Application Block Diagram
Figure 32-19: Time Slot Application Block Diagram
SSC
RK
RF
RD
TD
TF
TK
Serial Data Clock (SCLK)
Frame sync (FSYNC)
Serial Data Out
Serial Data In
CODEC
Serial Data Clock (SCLK)
Frame sync (FSYNC)
Serial Data Out
Serial Data In
First Time Slot
Dstart
Dend
SSC
RK
RF
RD
TD
TF
TK
SCLK
FSYNC
Data Out
Data in
CODEC
First
Time Slot
Serial Data Clock (SCLK)
Frame sync (FSYNC)
Serial Data Out
Serial Data in
CODEC
Second
Time Slot
First Time Slot
Second Time Slot
Dstart
Dend