Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 497
SAM9G20
32.3 Application Block Diagram
Figure 32-2: Application Block Diagram
32.4 Pin Name List
32.5 Product Dependencies
32.5.1 I/O Lines
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.
Before using the SSC receiver, the PIO controller must be configured to dedicate the SSC receiver I/O lines to the SSC peripheral mode.
Before using the SSC transmitter, the PIO controller must be configured to dedicate the SSC transmitter I/O lines to the SSC peripheral
mode.
32.5.2 Power Management
The SSC is not continuously clocked. The SSC interface may be clocked through the Power Management Controller (PMC), therefore the
programmer must first configure the PMC to enable the SSC clock.
32.5.3 Interrupt
The SSC interface has an interrupt line connected to the Advanced Interrupt Controller (AIC). Handling interrupts requires programming
the AIC before configuring the SSC.
All SSC interrupts can be enabled/disabled configuring the SSC Interrupt mask register. Each pending and unmasked SSC interrupt will
assert the SSC interrupt line. The SSC interrupt service routine can get the interrupt origin by reading the SSC interrupt status register.
32.6 Functional Description
This section contains the functional description of the following: SSC Functional Block, Clock Management, Data format, Start, Transmitter,
Receiver and Frame Sync.
The receiver and transmitter operate separately. However, they can work synchronously by programming the receiver to use the transmit
clock and/or to start a data transfer when transmission starts. Alternatively, this can be done by programming the transmitter to use the
receive clock and/or to start a data transfer when reception starts. The transmitter and the receiver can be programmed to operate with
the clock signals provided on either the TK or RK pins. This allows the SSC to support many slave-mode data transfers. The maximum
clock speed allowed on the TK and RK pins is the master clock divided by 2.
Table 32-1: I/O Lines Description
Pin Name Pin Description Type
RF Receiver Frame Synchro Input/Output
RK Receiver Clock Input/Output
RD Receiver Data Input
TF Transmitter Frame Synchro Input/Output
TK Transmitter Clock Input/Output
TD Transmitter Data Output
Interrupt
Management
Power
Management
Test
Management
SSC
Serial AUDIO
OS or RTOS Driver
Codec
Frame
Management
Line Interface
Time Slot
Management