Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 481
SAM9G20
31.7.4 USART Interrupt Disable Register
Name:US_IDR
Access:Write-only
RXRDY: RXRDY Interrupt Disable
TXRDY: TXRDY Interrupt Disable
RXBRK: Receiver Break Interrupt Disable
ENDRX: End of Receive Transfer Interrupt Disable
ENDTX: End of Transmit Interrupt Disable
OVRE: Overrun Error Interrupt Disable
FRAME: Framing Error Interrupt Disable
PARE: Parity Error Interrupt Disable
TIMEOUT: Time-out Interrupt Disable
TXEMPTY: TXEMPTY Interrupt Disable
ITER: Iteration Interrupt Enable
TXBUFE: Buffer Empty Interrupt Disable
RXBUFF: Buffer Full Interrupt Disable
NACK: Non Acknowledge Interrupt Disable
RIIC: Ring Indicator Input Change Disable
DSRIC: Data Set Ready Input Change Disable
DCDIC: Data Carrier Detect Input Change Interrupt Disable
CTSIC: Clear to Send Input Change Interrupt Disable
MANE: Manchester Error Interrupt Disable
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
– – – MANE CTSIC DCDIC DSRIC RIIC
15 14 13 12 11 10 9 8
– – NACK RXBUFF TXBUFE ITER TXEMPTY TIMEOUT
76543210
PARE FRAME OVRE ENDTX ENDRX RXBRK TXRDY RXRDY