Datasheet

SAM9G20
DS60001516A-page 46 2017 Microchip Technology Inc.
10.3.9 New Arm Instruction Set
Note 1: A Thumb BLX contains two consecutive Thumb instructions, and takes four cycles.
10.3.10 Thumb Instruction Set Overview
The Thumb instruction set is a re-encoded subset of the Arm instruction set.
The Thumb instruction set is divided into:
Branch instructions
Data processing instructions
Load and Store instructions
Load and Store multiple instructions
Exception-generating instruction
For further details, see the Arm Technical Reference Manual, Arm ref. DDI0198B.
Table 10-4 gives the Thumb instruction mnemonic list.
Table 10-3: New Arm Instruction Mnemonic List
Mnemonic Operation Mnemonic Operation
BXJ Branch and exchange to Java MRRC Move double from coprocessor
BLX
(1)
Branch, Link and exchange MCR2 Alternative move of Arm reg to coprocessor
SMLAxy Signed Multiply Accumulate 16 * 16 bit MCRR Move double to coprocessor
SMLAL Signed Multiply Accumulate Long CDP2 Alternative Coprocessor Data Processing
SMLAWy Signed Multiply Accumulate 32 * 16 bit BKPT Breakpoint
SMULxy Signed Multiply 16 * 16 bit PLD
Soft Preload, Memory prepare to load from
address
SMULWy Signed Multiply 32 * 16 bit STRD Store Double
QADD Saturated Add STC2 Alternative Store from Coprocessor
QDADD Saturated Add with Double LDRD Load Double
QSUB Saturated subtract LDC2 Alternative Load to Coprocessor
QDSUB Saturated Subtract with double CLZ Count Leading Zeroes
Table 10-4: Thumb Instruction Mnemonic List
Mnemonic Operation Mnemonic Operation
MOV Move MVN Move Not
ADDAdd ADCAdd with Carry
SUB Subtract SBC Subtract with Carry
CMP Compare CMN Compare Negated
TST Test NEG Negate
AND Logical AND BIC Bit Clear
EOR Logical Exclusive OR ORR Logical (inclusive) OR
LSL Logical Shift Left LSR Logical Shift Right
ASR Arithmetic Shift Right ROR Rotate Right
MUL Multiply BLX Branch, Link, and Exchange
B Branch BL Branch and Link
BX Branch and Exchange SWI Software Interrupt