Datasheet

SAM9G20
DS60001516A-page 428  2017 Microchip Technology Inc.
2: SCLWS is automatically set when the clock synchronization mechanism is started and automatically reset when the mecha-
nism is finished.
• Reversal after a Repeated Start
Reversal of Read to Write
The master initiates the communication by a read command and finishes it by a write command.
Figure 30-29 describes the repeated start + reversal from Read to Write mode.
Figure 30-29: Repeated Start + Reversal from Read to Write Mode
Note 1: TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
Reversal of Write to Read
The master initiates the communication by a write command and finishes it by a read command.Figure 30-30 describes the repeated start
+ reversal from Write to Read mode.
Figure 30-30: Repeated Start + Reversal from Write to Read Mode
Note 1: In this case, if TWI_THR has not been written at the end of the read command, the clock is automatically stretched before the
ACK.
2: TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
S SADR R ADATA0A DATA1
SADRSr
NA
W A DATA 2 A DATA 3 AP
Cleared after read
DATA0 DATA1
DATA2 DATA 3
SVACC
SVREAD
TWD
TWI_THR
TWI_RHR
EOSACC
TXRDY
RXRDY
TXCOMP
As soon as a START is detected
S SADR W ADATA 0A DATA 1
SADRSr
A
R A DATA2 A DATA3 NA P
Cleared after read
DATA0
DATA2 DATA3
DATA1
TXCOMP
TXRDY
RXRDY
As soon as a START is detected
Read TWI_RHR
SVACC
SVREAD
TWD
TWI_RHR
TWI_THR
EOSACC