Datasheet

SAM9G20
DS60001516A-page 426  2017 Microchip Technology Inc.
Figure 30-25: Write Access Ordered by a Master
Note 1: When SVACC is low, the state of SVREAD becomes irrelevant.
2: RXRDY is set when data has been transmitted from the shift register to the TWI_RHR and reset when this data is read.
• General Call
The general call is performed in order to change the address of the slave.
If a GENERAL CALL is detected, GACC is set.
After the detection of General Call, it is up to the programmer to decode the commands which come afterwards.
In case of a WRITE command, the programmer has to decode the programming sequence and program a new SADR if the programming
sequence matches.
Figure 30-26 describes the General Call access.
Figure 30-26: Master Performs a General Call
Note: This method allows the user to create an own programming sequence by choosing the programming bytes and the number of
them. The programming sequence has to be provided to the master.
• Clock Synchronization
In both read and write modes, it may happen that TWI_THR/TWI_RHR buffer is not filled /emptied before the emission/reception of a new
character. In this case, to avoid sending/receiving undesired data, a clock stretching mechanism is implemented.
Clock Synchronization in Read Mode
The clock is tied low if the shift register is empty and if a STOP or REPEATED START condition was not detected. It is tied low until the
shift register is loaded.
Figure 30-27 describes the clock synchronization in Read mode.
RXRDY
Read RHR
SVREAD has to be taken into account only while SVACC is active
TWD
SVACC
SVREAD
EOSVACC
SADR does not match,
TWI answers with a NACK
SADRS ADR W NA W A DATA A A DATA NA S/SrDATA NA P/S/Sr
SADR matches,
TWI answers with an ACK
0000000 + W
GENERAL CALL
P
S
A
GENERAL CALL Reset or write DADD
A New SADR
DATA1
A DATA2
A
A
New SADR
Programming sequence
TXD
GCACC
SVACC
RESET command = 00000110X
WRITE command = 00000100X
Reset after read