Datasheet
SAM9G20
DS60001516A-page 412 2017 Microchip Technology Inc.
Figure 30-6: Master Write with On Data Byte
Figure 30-7: Master Write with Multiple Data Byte
Figure 30-8: Master Write with One Byte Internal Address and Multiple Data Bytes
30.6.3.5 Master Receiver Mode
The read sequence begins by setting the START bit. After the start condition has been sent, the master sends a 7-bit slave address to
notify the slave device. The bit following the slave address indicates the transfer direction, 1 in this case (MREAD = 1 in TWI_MMR). During
the acknowledge clock pulse (9th pulse), the master releases the data line (HIGH), enabling the slave to pull it down in order to generate
the acknowledge. The master polls the data line during this clock pulse and sets the NACK bit in the status register if the slave does not
acknowledge the byte.
If an acknowledge is received, the master is then ready to receive data from the slave. After data has been received, the master sends an
acknowledge condition to notify the slave that the data has been received except for the last data, after the stop condition. See Figure 30-
9. When the RXRDY bit is set in the status register, a character has been received in the receive-holding register (TWI_RHR). The RXRDY
bit is reset when reading the TWI_RHR.
When a single data byte read is performed, with or without internal address (IADR), the START and STOP bits must be set at the same
time. See Figure 30-9. When a multiple data byte read is performed, with or without internal address (IADR), the STOP bit must be set
after the next-to-last data received. See Figure 30-10. For Internal Address usage see Section 30.6.3.6 Internal Address.
TXCOMP
TXRDY
Write THR (DATA)
STOP sent automaticaly
(ACK received and TXRDY = 1)
TWD
A DATA AS DADR W P
A DATA n AS DADR W DATA n+5 A PDATA n+x A
TXCOMP
TXRDY
Write THR (Data n) Write THR (Data n+1) Write THR (Data n+x)
Last data sent
STOP sent automaticaly
(ACK received and TXRDY = 1)
TWD
A IADR(7:0) A DATA n AS DADR W DATA n+5 A PDATA n+x A
TXCOMP
TXRDY
TWD
Write THR (Data n) Write THR (Data n+1) Write THR (Data n+x)
Last data sent
STOP sent automaticaly
(ACK received and TXRDY = 1)