Datasheet

SAM9G20
DS60001516A-page 410  2017 Microchip Technology Inc.
30.5 Product Dependencies
30.5.1 I/O Lines
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current source or pull-up resistor (see Figure 30-
2). When the bus is free, both lines are high. The output stages of devices connected to the bus must have an open-drain or open-collector
to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with PIO lines. To enable the TWI, the programmer must perform the following steps:
• Program the PIO controller to:
- Dedicate TWD and TWCK as peripheral lines.
- Define TWD and TWCK as open-drain.
30.5.2 Power Management
• Enable the peripheral clock.
The TWI interface may be clocked through the Power Management Controller (PMC), thus the programmer must first configure the PMC
to enable the TWI clock.
30.5.3 Interrupt
The TWI interface has an interrupt line connected to the Advanced Interrupt Controller (AIC). In order to handle interrupts, the AIC must
be programmed before configuring the TWI.
30.6 Functional Description
30.6.1 Transfer Format
The data put on the TWD line must be 8 bits long. Data is transferred MSB first; each byte must be followed by an acknowledgement. The
number of bytes per transfer is unlimited (see Figure 30-4).
Each transfer begins with a START condition and terminates with a STOP condition (see Figure 30-3).
• A high-to-low transition on the TWD line while TWCK is high defines the START condition.
• A low-to-high transition on the TWD line while TWCK is high defines a STOP condition.
Figure 30-3: START and STOP Conditions
Figure 30-4: Transfer Format
30.6.2 Modes of Operation
The TWI has six modes of operations:
• Master transmitter mode
• Master receiver mode
• Multi-master transmitter mode
TWD
TWCK
Start Stop
TWD
TWCK
Start Address R/W Ack Data Ack Data Ack Stop