Datasheet

SAM9G20
DS60001516A-page 402  2017 Microchip Technology Inc.
TXEMPTY: Transmission Registers Empty
0: As soon as data is written in SPI_TDR.
1: SPI_TDR and internal shifter are empty. If a transfer delay has been defined, TXEMPTY is set after the completion of such delay.
SPIENS: SPI Enable Status
0: SPI is disabled.
1: SPI is enabled.
Note 1: SPI_RCR, SPI_RNCR, SPI_TCR, SPI_TNCR are physically located in the PDC.