Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 37
SAM9G20
The USART1 and USART2 do not implement all the modem signals. Only RTS and CTS (RTS1 and CTS1, RTS2 and CTS2, respectively)
are implemented in these USARTs for other features.
Thus, programming the USART1, USART2 or the USART3 in Modem Mode may lead to unpredictable results. In these USARTs, the com-
mands relating to the Modem Mode have no effect and the status bits relating the status of the modem signals are never activated.
9.4.4 Serial Synchronous Controller
• Provides serial synchronous communication links used in audio and telecom applications (with CODECs in Master or Slave Modes,
I
2
S, TDM Buses, Magnetic Card Reader, etc.)
• Contains an independent receiver and transmitter and a common clock divider
• Offers a configurable frame sync and data length
• Receiver and transmitter can be programmed to start automatically or on detection of different event on the frame sync signal
• Receiver and transmitter include a data signal, a clock signal and a frame synchronization signal
9.4.5 Timer Counter
• Two blocks of three 16-bit Timer Counter channels
• Each channel can be individually programmed to perform a wide range of functions including:
- Frequency Measurement
- Event Counting
- Interval Measurement
- Pulse Generation
- Delay Timing
- Pulse Width Modulation
- Up/down Capabilities
• Each channel is user-configurable and contains:
- Three external clock inputs
- Five internal clock inputs
- Two multi-purpose input/output signals
• Each block contains two global registers that act on all three TC Channels
Note: TC Block 0 (TC0, TC1, TC2) and TC Block 1 (TC3, TC4, TC5) have identical user interfaces. See Figure 7-1 for TC Block 0
and TC Block 1 base addresses.
9.4.6 Multimedia Card Interface
• One double-channel MultiMedia Card Interface
• Compatibility with MultiMedia Card Specification Version 3.11
• Compatibility with SD Memory Card Specification Version 1.1
• Compatibility with SDIO Specification Version V1.0.
• Card clock rate up to Master Clock divided by 2
• Embedded power management to slow down clock rate when not used
• MCI has two slots, each supporting
- One slot for one MultiMediaCard bus (up to 30 cards) or
- One SD Memory Card
• Support for stream, block and multi-block data read and write
9.4.7 USB Host Port
• Compliance with Open HCI Rev 1.0 Specification
• Compliance with USB V2.0 Full-speed and Low-speed Specification
• Supports both Low-Speed 1.5 Mbps and Full-speed 12 Mbps devices
• Root hub integrated with two downstream USB ports in the 217-LFBGA package
• Two embedded USB transceivers
• Supports power management
• Operates as a master on the Matrix