Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 335
SAM9G20
27.5.3 Debug Unit Interrupt Enable Register
Name:DBGU_IER
Access:Write-only
RXRDY: Enable RXRDY Interrupt
TXRDY: Enable TXRDY Interrupt
ENDRX: Enable End of Receive Transfer Interrupt
ENDTX: Enable End of Transmit Interrupt
OVRE: Enable Overrun Error Interrupt
FRAME: Enable Framing Error Interrupt
PARE: Enable Parity Error Interrupt
TXEMPTY: Enable TXEMPTY Interrupt
TXBUFE: Enable Buffer Empty Interrupt
RXBUFF: Enable Buffer Full Interrupt
COMMTX: Enable COMMTX (from Arm) Interrupt
COMMRX: Enable COMMRX (from Arm) Interrupt
0: No effect.
1: Enables the corresponding interrupt.
31 30 29 28 27 26 25 24
COMMRXCOMMTX––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
– – – RXBUFF TXBUFE – TXEMPTY –
76543210
PARE FRAME OVRE ENDTX ENDRX – TXRDY RXRDY