Datasheet
SAM9G20
DS60001516A-page 324 2017 Microchip Technology Inc.
27. Debug Unit (DBGU)
27.1 Overview
The Debug Unit provides a single entry point from the processor for access to all the debug capabilities of Microchip’s Arm-based systems.
The Debug Unit features a two-pin UART that can be used for several debug and trace purposes and offers an ideal medium for in-situ
programming solutions and debug monitor communications. The Debug Unit two-pin UART can be used stand-alone for general purpose
serial communication. Moreover, the association with two peripheral data controller channels permits packet handling for these tasks with
processor time reduced to a minimum.
The Debug Unit features a two-pin UART that can be used for several debug and trace purposes and offers an ideal medium for in-situ
programming solutions and debug monitor communications. Moreover, the association with two peripheral data controller channels per-
mits packet handling for these tasks with processor time reduced to a minimum.
The Debug Unit also makes the Debug Communication Channel (DCC) signals provided by the In-circuit Emulator of the Arm processor
visible to the software. These signals indicate the status of the DCC read and write registers and generate an interrupt to the Arm proces-
sor, making possible the handling of the DCC under interrupt control.
Chip Identifier registers permit recognition of the device and its revision. These registers inform as to the sizes and types of the on-chip
memories, as well as the set of embedded peripherals.
Finally, the Debug Unit features a Force NTRST capability that enables the software to decide whether to prevent access to the system
via the In-circuit Emulator. This permits protection of the code, stored in ROM.
27.2 Block Diagram
Figure 27-1: Debug Unit Functional Block Diagram
Peripheral DMA Controller
Baud Rate
Generator
DCC
Handler
ICE
Access
Handler
Tra nsmit
Receive
Chip ID
Interrupt
Control
Peripheral
Bridge
Parallel
Input/
Output
DTXD
DRXD
Power
Management
Controller
Arm
Processor
force_ntrst
COMMRX
COMMTX
MCK
nTRST
Power-on
Reset
dbgu_irq
APB
Debug Unit