Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 29
SAM9G20
8.5 Power Management Controller
•Provides:
- the Processor Clock PCK
- the Master Clock MCK, in particular to the Matrix and the memory interfaces.The MCK divider can be 1,2,4,6
- the USB Device Clock UDPCK
- independent peripheral clocks, typically at the frequency of MCK
- 2 programmable clock outputs: PCK0, PCK1
• Five flexible operating modes:
- Normal Mode, processor and peripherals running at a programmable frequency
- Idle Mode, processor stopped waiting for an interrupt
- Slow Clock Mode, processor and peripherals running at low frequency
- Standby Mode, mix of Idle and Backup Mode, peripheral running at low frequency, processor stopped waiting for an interrupt
- Backup Mode, Main Power Supplies off, VDDBU powered by a battery
Figure 8-3: SAM9G20 Power Management Controller Block Diagram
8.6 Periodic Interval Timer
• Includes a 20-bit Periodic Counter, with less than 1 µs accuracy
• Includes a 12-bit Interval Overlay Counter
• Real Time OS or Linux
®
/Windows CE
®
compliant tick generator
8.7 Watchdog Timer
• 16-bit key-protected only-once-Programmable Counter
• Windowed, prevents the processor being in a dead-lock on the watchdog access
MCK
periph_clk[..]
int
SLCK
MAINCK
PLLACK
Prescaler
/1,/2,/4,.../64
PCK
Processor
Clock
Controller
Idle Mode
Master Clock Controller
Peripherals
Clock Controller
ON/OFF
PLLBCK
Divider
/1,/2,/4,/6
USB Clock Controller
SLCK
MAINCK
PLLACK
Prescaler
/1,/2,/4,...,/64
Programmable Clock Controller
PLLBCK
Divider
/1,/2,/4
pck[..]
PLLBCK
UDPCK
ON/OFF
ON/OFF
/1,/2
Divider