Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 287
SAM9G20
25.9.11 PMC Master Clock Register
Name:PMC_MCKR
Access:Read/Write
CSS: Master/Processor Clock Source Selection
PRES: Master/Processor Clock Prescaler
MDIV: Master Clock Division
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
–––PDIV–– MDIV
76543210
––– PRES CSS
CSS Clock Source Selection
0 0 Slow Clock is selected
0 1 Main Clock is selected
1 0 PLLA Clock is selected
1 1 PLLB Clock is selected
PRES Master/Processor Clock Dividers Input Clock
0 0 0 Selected clock
0 0 1 Selected clock divided by 2
0 1 0 Selected clock divided by 4
0 1 1 Selected clock divided by 8
1 0 0 Selected clock divided by 16
1 0 1 Selected clock divided by 32
1 1 0 Selected clock divided by 64
1 1 1 Reserved
MDIV Master Clock Division
0 0 Master Clock is Prescaler Output Clock divided by 1.
0 1 Master Clock is Prescaler Output Clock divided by 2.
1 0 Master Clock is Prescaler Output Clock divided by 4.
1 1 Master Clock is Prescaler Output Clock divided by 6.