Datasheet

SAM9G20
DS60001516A-page 264  2017 Microchip Technology Inc.
24. Clock Generator
24.1 Overview
The Clock Generator is made up of 2 PLLs, a Main Oscillator, as well as an RC Oscillator and a 32768 Hz low-power Oscillator.
It provides the following clocks:
• SLCK, the Slow Clock, which is the only permanent clock within the system
• MAINCK is the output of the Main Oscillator
The Clock Generator User Interface is embedded within the Power Management Controller one and is described in Section 25.9 “Power
Management Controller (PMC) User Interface”. However, the Clock Generator registers are named CKGR_.
• PLLACK is the output of the Divider and PLL A block
• PLLBCK is the output of the Divider and PLL B block
24.2 Slow Clock Crystal Oscillator
The Clock Generator integrates a 32768 Hz low-power oscillator. The XIN32 and XOUT32 pins must be connected to a 32768 Hz crystal.
Two external capacitors must be wired as shown in Figure 24-1.
Figure 24-1: Typical Slow Clock Crystal Oscillator Connection
24.3 Slow Clock RC Oscillator
The user has to take into account the possible drifts of the RC Oscillator. More details are given in Section 40.2 “DC Characteristics”.
24.4 Main Oscillator
Figure 24-2 shows the Main Oscillator block diagram.
Figure 24-2: Main Oscillator Block Diagram
XIN32 XOUT32 GNDPLL
32,768 Hz
Crystal
XIN
XOUT
MOSCEN
Main
Oscillator
Counter
OSCOUNT
MOSCS
MAINCK
Main Clock
Main Clock
Frequency
Counter
MAINF
MAINRDY
SLCK
Slow Clock
Main
Oscillator