Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 201
SAM9G20
21.6.3 SDRAMC Configuration Register
Name:SDRAMC_CR
Access:Read/Write
NC: Number of Column Bits
Reset value is 8 column bits.
NR: Number of Row Bits
Reset value is 11 row bits.
NB: Number of Banks
Reset value is two banks.
31 30 29 28 27 26 25 24
TXSR TRAS
23 22 21 20 19 18 17 16
TRCD TRP
15 14 13 12 11 10 9 8
TRC TWR
76543210
DBW CAS NB NR NC
NC Column Bits
008
019
1010
1111
NR Row Bits
00 11
01 12
10 13
11 Reserved
NB Number of Banks
02
14