Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 199
SAM9G20
21.6.1 SDRAMC Mode Register
Name:SDRAMC_MR
Access:Read/Write
MODE: SDRAMC Command Mode
This field defines the command issued by the SDRAM Controller when the SDRAM device is accessed.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
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MODE
MODE Description
000
Normal mode. Any access to the SDRAM is decoded normally. To activate this mode, command must be
followed by a write to the SDRAM.
001
The SDRAM Controller issues a NOP command when the SDRAM device is accessed regardless of the cycle.
To activate this mode, command must be followed by a write to the SDRAM.
010
The SDRAM Controller issues an “All Banks Precharge” command when the SDRAM device is accessed
regardless of the cycle. To activate this mode, command must be followed by a write to the SDRAM.
011
The SDRAM Controller issues a “Load Mode Register” command when the SDRAM device is accessed
regardless of the cycle. To activate this mode, command must be followed by a write to the SDRAM.
100
The SDRAM Controller issues an “Auto-Refresh” Command when the SDRAM device is accessed regardless of
the cycle. Previously, an “All Banks Precharge” command must be issued. To activate this mode, command must
be followed by a write to the SDRAM.
101
The SDRAM Controller issues an “Extended Load Mode Register” command when the SDRAM device is
accessed regardless of the cycle. To activate this mode, the “Extended Load Mode Register” command must be
followed by a write to the SDRAM. The write in the SDRAM must be done in the appropriate bank; most low-
power SDRAM devices use the bank 1.
1 1 0 Deep power-down mode. Enters deep power-down mode.