Datasheet

 2017 Microchip Technology Inc. DS60001516A-page 139
SAM9G20
Figure 19-5: CompactFlash Application Example
19.6.7 NAND Flash Support
The External Bus Interface integrates circuitry that interfaces to NAND Flash devices.
19.6.7.1 External Bus Interface
The NAND Flash logic is driven by the Static Memory Controller on the NCS3 address space. Programming the EBI_CS3A field in the
EBI_CSA register to the appropriate value enables the NAND Flash logic. For details on this register, refer to Section 18. “SAM9G20 Bus
Matrix”. Access to an external NAND Flash device is then made by accessing the address space reserved to NCS3 (i.e., between 0x4000
0000 and 0x4FFF FFFF).
The NAND Flash Logic drives the read and write command signals of the SMC on the NANDOE and NANDWE signals when the NCS3
signal is active. NANDOE and NANDWE are invalidated as soon as the transfer address fails to lie in the NCS3 address space. See
Figure 19-6 for more information. For details on the waveforms, refer to Section 20. “Static Memory Controller (SMC)”.
CompactFlash ConnectorEBI
D[15:0]
/OEDIR
_CD1
_CD2
/OE
D[15:0]
A25/CFRNW
NCS4/CFCS0
CD (PIO)
A[10:0]
A22/REG
NOE/CFOE
A[10:0]
_REG
_OE
_WE
_IORD
_IOWR
_CE1
_CE2
NWE/CFWE
NWR1/CFIOR
NWR3/CFIOW
CFCE1
CFCE2
_WAIT
NWAIT