Datasheet

SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
950
44.3 Functional Description
44.3.1 Hardware Acceleration
The hardware acceleration performs multiple block transfers, line draw or fill commands by issuing draw
commands to the controller. This technique makes it possible to get rid of complex software layers.
44.3.1.1 Line Draw
Lines can be drawn up to a specific width scalable from 1 to 16 pixels. They can also be drawn as a broken line
with a pattern set by a 16-bit pattern register.
The following registers need to be programmed by the software to start a line draw:
 TDGC_SBXR: Starting position in pixel units on X-axis.
 TDGC_TEXR: Ending position in pixel units on X-axis.
 TDGC_SBYR: Starting position in pixel units on Y-axis.
 TDGC_TEYR: Ending position in pixel units on Y-axis.
 TDGC_LOR: Set LOC bitfield to select logic operation MOV.
 TDGC_CSR: Set CLR[3:0] bitfield to select a color.
 TDGC_GOR: Set GOC bitfield and OP bitfields to the to select the following values.
 Set GOC[7:4] to select line draw.
 Set OP[0] to select a 1D or 2D line draw.
 Set OP[1] to select update X & Y or no update X & Y.
 Set OP[2] to select relative or absolute.
 Set OP[3] to select no transformation.
 TDGC_LWR: Set LWD bitfield to select line width in pixels.
 TDGC_LPR: Set LPT bitfield to select a pattern for the line. 0xFFFF is for solid.
LTB bit in TDGC_GSR will signal the completion of the drawing operation.