Datasheet

927
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
43.11.13 LCD Timing Configuration Register 2
Name: LCDTIM2
Address: 0x0070080C
Access: Read/Write
• HBP: Horizontal Back Porch
Number of idle LCDDOTCK cycles at the beginning of the line. Idle period is (HBP+1) LCDDOTCK cycles.
• HPW: Horizontal synchronization pulse width
Width of the LCDHSYNC pulse, given in LCDDOTCK cycles. Width is (HPW+1) LCDDOTCK cycles.
• HFP: Horizontal Front Porch
Number of idle LCDDOTCK cycles at the end of the line. Idle period is (HFP+2) LCDDOTCK cycles.
31 30 29 28 27 26 25 24
HFP
23 22 21 20 19 18 17 16
HFP –––––
15 14 13 12 11 10 9 8
–– HPW
76543210
HBP