Datasheet

921
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
43.11.8 DMA Control Register
Name: DMACON
Address: 0x0070001C
Access: Read/Write
• DMAEN: DMA Enable
0: DMA is disabled.
1: DMA is enabled.
• DMARST: DMA Reset (Write-only)
0: No effect.
1: Reset DMA module. DMA Module should be reset only when disabled and in idle state.
• DMABUSY: DMA Busy
0: DMA module is idle.
1: DMA module is busy (doing a transaction on the AHB bus).
• DMAUPDT: DMA Configuration Update
0: No effect
1: Update DMA Configuration
. Used for simultaneous updating of DMA parameters in dual scan mode or when using 2D
addressing. The values written in the registers DMABADDR1, DMABADDR2 and DMA2DCFG, and in the field FRMSIZE
of register DMAFRMCFG, are accepted by the DMA controller and are applied at the next frame. This bit is used only if a
dual scan configuration is selected (bit SCANMOD of LCDCON2 register) or 2D addressing is enabled (bit DMA2DEN in
this register). Otherwise, the LCD controller accepts immediately the values written in the registers referred to above.
• DMA2DEN: DMA 2D Addressing Enable
0: 2D addressing is disabled (values in register DMA2DCFG are “don’t care”).
1: 2D addressing is enabled.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
– – – DMA2DEN DMAUPDT DMABUSY DMARST DMAEN