Datasheet

SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
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The MII and RMII interface are capable of both 10Mb/s and 100Mb/s data rates as described in the IEEE 802.3u
standard. The signals used by the MII and RMII interfaces are described in Table 40-5.
The intent of the RMII is to provide a reduced pin count alternative to the IEEE 802.3u MII. It uses two bits for
transmit (ETX0 and ETX1) and two bits for receive (ERX0 and ERX1). There is a Transmit Enable (ETXEN), a
Receive Error (ERXER), a Carrier Sense (ECRS_DV), and a 50 MHz Reference Clock (ETXCK_EREFCK) for
100 Mb/s data rate.
40.4.12.1 RMII Transmit and Receive Operation
The same signals are used internally for both the RMII and the MII operations. The RMII maps these signals in a
more pin-efficient manner. The transmit and receive bits are converted from a 4-bit parallel format to a 2-bit parallel
scheme that is clocked at twice the rate. The carrier sense and data valid signals are combined into the ECRSDV
signal. This signal contains information on carrier sense, FIFO status, and validity of the data. Transmit error bit
(ETXER) and collision detect (ECOL) are not used in RMII mode.
40.5 Programming Interface
40.5.1 Initialization
40.5.1.1 Configuration
Initialization of the EMAC configuration (e.g., loop-back mode, frequency ratios) must be done while the transmit
and receive circuits are disabled. See the description of the network control register and network configuration
register earlier in this document.
To change loop-back mode, the following sequence of operations must be followed:
1. Write to network control register to disable transmit and receive circuits.
2. Write to network control register to change loop-back mode.
3. Write to network control register to re-enable transmit or receive circuits.
Note: These writes to network control register cannot be combined in any way.
Table 40-5. Pin Configuration
Pin Name MII RMII
ETXCK_EREFCK ETXCK: Transmit Clock EREFCK: Reference Clock
ECRS ECRS: Carrier Sense
ECOL ECOL: Collision Detect
ERXDV ERXDV: Data Valid ECRSDV: Carrier Sense/Data Valid
ERX0–ERX3 ERX0–ERX3: 4-bit Receive Data ERX0–ERX1: 2-bit Receive Data
ERXER ERXER: Receive Error ERXER: Receive Error
ERXCK ERXCK: Receive Clock
ETXEN ETXEN: Transmit Enable ETXEN: Transmit Enable
ETX0–ETX3 ETX0–ETX3: 4-bit Transmit Data ETX0–ETX1: 2-bit Transmit Data
ETXER ETXER: Transmit Error