Datasheet

75
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
Figure 11-6. AMP Mictor Connector Orientation
11.5.6 IEEE 1149.1 JTAG Boundary Scan
IEEE 1149.1 JTAG Boundary Scan allows pin-level access independent of the device packaging technology.
IEEE 1149.1 JTAG Boundary Scan is enabled when JTAGSEL is high. The SAMPLE, EXTEST and BYPASS
functions are implemented. In ICE debug mode, the ARM processor responds with a non-JTAG chip ID that
identifies the processor to the ICE system. This is not IEEE 1149.1 JTAG-compliant.
It is not possible to switch directly between JTAG and ICE operations. A chip reset must be performed after
JTAGSEL is changed.
A Boundary-scan Descriptor Language (BSDL) file is provided to set up test.
11.5.6.1 JTAG Boundary Scan Register
The Boundary Scan Register (BSR) contains 664 bits that correspond to active pins and associated control
signals.
Each SAM9263 input/output pin corresponds to a 3-bit register in the BSR. The OUTPUT bit contains data that
can be forced on the pad. The INPUT bit facilitates the observability of data applied to the pad. The CONTROL bit
selects the direction of the pad.
38 37
2 1
Pin 1Chamfer
AT91SAM9263-based
Application Board
Table 11-3. SAM9263 JTAG Boundary Scan Register
Bit
Number Pin Name Pin Type
Associated
BSR Cells
663
PA19 IN/OUT
INPUT
662 OUTPUT
661 CONTROL
660
PA20 IN/OUT
INPUT
659 OUTPUT
658 CONTROL
657
PA21 IN/OUT
INPUT
656 OUTPUT
655 CONTROL
654
PA22 IN/OUT
INPUT
653 OUTPUT
652 CONTROL