Datasheet

669
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
36.8.6 CAN Baudrate Register
Name: CAN_BR
Address: 0xFFFAC014
Access: Read/Write
Any modification on one of the fields of the CAN_BR must be done while CAN module is disabled.
To compute the different Bit Timings, please refer to the Section 36.6.4.1 “CAN Bit Timing Configuration” on page 638.
• PHASE2: Phase 2 segment
This phase is used to compensate the edge phase error.
Warning: PHASE2 value must be different from 0.
• PHASE1: Phase 1 segment
This phase is used to compensate for edge phase error.
• PROPAG: Programming time segment
This part of the bit time is used to compensate for the physical delay times within the network.
• SJW: Re-synchronization jump width
To compensate for phase shifts between clock oscillators of different controllers on bus. The controller must re-synchro-
nize on any relevant signal edge of the current transmission. The synchronization jump width defines the maximum of
clock cycles a bit period may be shortened or lengthened by re-synchronization.
• BRP: Baudrate Prescaler.
This field allows user to program the period of the CAN system clock to determine the individual bit timing.
The BRP field must be within the range [1, 0x7F], i.e., BRP = 0 is not authorized.
31 30 29 28 27 26 25 24
–––––––SMP
23 22 21 20 19 18 17 16
–BRP
15 14 13 12 11 10 9 8
– – SJW – PROPAG
76543210
– PHASE1 – PHASE2
t
PHS2
t
CSC
PHASE2 1+()×=
t
PHS1
t
CSC
PHASE1 1+()×=
t
PRS
t
CSC
PROPAG 1+()×=
t
SJW
t
CSC
SJW 1+()×=
t
CSC
BRP 1+()MCK⁄=