Datasheet

643
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
In Error Active Mode, the user reads:
 ERRA = 1
 ERRP = 0
 BOFF = 0
In Error Passive Mode, the user reads:
 ERRA = 0
 ERRP = 1
 BOFF = 0
In Bus Off Mode, the user reads:
 ERRA = 0
 ERRP = 1
 BOFF = 1
The CAN interrupt handler should do the following:
 Only enable one error mode interrupt at a time.
 Look at and check the REC and TEC values in the interrupt handler to determine the current state.
36.6.4.7 Overload
The overload frame is provided to request a delay of the next data or remote frame by the receiver node (“Request
overload frame”) or to signal certain error conditions (“Reactive overload frame”) related to the intermission field
respectively.
Reactive overload frames are transmitted after detection of the following error conditions:
 Detection of a dominant bit during the first two bits of the intermission field
 Detection of a dominant bit in the last bit of EOF by a receiver, or detection of a dominant bit by a receiver or
a transmitter at the last bit of an error or overload frame delimiter
The CAN controller can generate a request overload frame automatically after each message sent to one of the
CAN controller mailboxes. This feature is enabled by setting the OVL bit in the CAN_MR.
Reactive overload frames are automatically handled by the CAN controller even if the OVL bit in the CAN_MR is
not set. An overload flag is generated in the same way as an error flag, but error counters do not increment.
36.6.5 Low-power Mode
In Low-power Mode, the CAN controller cannot send or receive messages. All mailboxes are inactive.
In Low-power Mode, the SLEEP signal in the CAN_SR is set; otherwise, the WAKEUP signal in the CAN_SR is
set. These two fields are exclusive except after a CAN controller reset (WAKEUP and SLEEP are stuck at 0 after a
reset). After power-up reset, the Low-power Mode is disabled and the WAKEUP bit is set in the CAN_SR only after
detection of 11 consecutive recessive bits on the bus.