Datasheet

SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
538
The RTS pin is at a level inverse to the TXEMPTY bit. Significantly, the RTS pin remains high when a timeguard is
programmed so that the line can remain driven after the last character completion. Figure 33-27 gives an example
of the RTS waveform during a character transmission when the timeguard is enabled.
Figure 33-27. Example of RTS Drive with Timeguard
33.6.7 Test Modes
The USART can be programmed to operate in three different test modes. The internal loopback capability allows
on-board diagnostics. In the loopback mode the USART interface pins are disconnected or not and reconfigured
for loopback internally or externally.
33.6.7.1 Normal Mode
Normal mode connects the RXD pin on the receiver input and the transmitter output on the TXD pin.
Figure 33-28. Normal Mode Configuration
33.6.7.2 Automatic Echo Mode
Automatic echo mode allows bit-by-bit retransmission. When a bit is received on the RXD pin, it is sent to the TXD
pin, as shown in Figure 33-29. Programming the transmitter has no effect on the TXD pin. The RXD pin is still
connected to the receiver input, thus the receiver remains active.
Figure 33-29. Automatic Echo Mode Configuration
D0 D1 D2 D3 D4 D5 D6 D7
TXD
Start
Bit
Parity
Bit
Stop
Bit
Baud Rate
Clock
TG = 4
Write
US_THR
TXRDY
TXEMPTY
RTS
Receiver
Transmitter
RXD
TXD
Receiver
Transmitter
RXD
TXD