Datasheet
47
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
32 bits access to Data registers for each mailbox data object
Uses a 16-bit time stamp on receive and transmit message
Hardware concatenation of ID unmasked bitfields to speedup family ID processing
16-bit internal timer for Time Stamping and Network synchronization
Programmable reception buffer length up to 16 mailbox object
Priority Management between transmission mailboxes
Autobaud and listening mode
Low power mode and programmable wake-up on bus activity or by the application
Data, Remote, Error and Overload Frame handling
9.5.10 USB Host Port
See UHP Section 41.2 “Embedded Characteristics”.
9.5.11 USB Device Port
USB V2.0 full-speed compliant, 12 Mbits per second
Embedded USB V2.0 full-speed transceiver
Embedded 2,432-byte dual-port RAM for endpoints
Suspend/Resume logic
Ping-pong mode (two memory banks) for isochronous and bulk endpoints
Six general-purpose endpoints
Endpoint 0 and 3: 64 bytes, no ping-pong mode
Endpoint 1 and 2: 64 bytes, ping-pong mode
Endpoint 4 and 5: 512 bytes, ping-pong mode
9.5.12 LCD Controller
Single and Dual scan color and monochrome passive STN LCD panels supported
Single scan active TFT LCD panels supported
4-bit single scan, 8-bit single or dual scan, 16-bit dual scan STN interfaces supported
Up to 24-bit single scan TFT interfaces supported
Up to 16 gray levels for mono STN and up to 4096 colors for color STN displays
1, 2 bits per pixel (palletized), 4 bits per pixel (non-palletized) for mono STN
1, 2, 4, 8 bits per pixel (palletized), 16 bits per pixel (non-palletized) for color STN
1, 2, 4, 8 bits per pixel (palletized), 16, 24 bits per pixel (non-palletized) for TFT
Single clock domain architecture
Resolution supported up to 2048x2048
2D DMA Controller for management of virtual Frame Buffer
Allows management of frame buffer larger than the screen size and moving the view over this virtual
frame buffer
Automatic resynchronization of the frame buffer pointer to prevent flickering