Datasheet

SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
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Note: Setting AIC, SYSC, UHP and IRQ0–1 bits in the clock set/clear registers of the PMC has no effect.
9.2.1 Peripheral Interrupts and Clock Control
9.2.1.1 System Interrupt
The System Interrupt in Source 1 is the wired-OR of the interrupt signals coming from:
 the SDRAM Controller
 the Debug Unit
 the Periodic Interval Timer
 the Real-Time Timer
 the Watchdog Timer
 the Reset Controller
 the Power Management Controller
The clock of these peripherals cannot be deactivated and Peripheral ID 1 can only be used within the Advanced
Interrupt Controller.
9.2.1.2 External Interrupts
All external interrupt signals, i.e., the Fast Interrupt signal FIQ or the Interrupt signals IRQ0 to IRQ1, use a
dedicated Peripheral ID. However, there is no clock control associated with these peripheral IDs.
9.2.1.3 Timer Counter Interrupts
The three Timer Counter channels interrupt signals are OR-wired together to provide the interrupt source 19 of the
Advanced Interrupt Controller. This forces the programmer to read all Timer Counter status registers before
branching the right Interrupt Service Routine.
The Timer Counter channels clocks cannot be deactivated independently. Switching off the clock of the Peripheral
19 disables the clock of the three channels.
9.3 Peripherals Signals Multiplexing on I/O Lines
The SAM9263 device features five PIO controllers (PIOA, PIOB, PIOC, PIOD and PIOE) which multiplex the I/O
lines of the peripheral set.
Each PIO Controller controls up to 32 lines. Each line can be assigned to one of two peripheral functions, A or B.
The multiplexing tables define how the I/O lines of the peripherals A and B are multiplexed on the PIO Controllers.
The two columns “Function” and “Comments” have been inserted in this table for the user’s own comments; they
may be used to track how pins are defined in an application.
Note that some peripheral functions which are output only may be duplicated within both tables.
The column “Reset State” indicates whether the PIO Line resets in I/O mode or in peripheral mode. If I/O is
specified, the PIO Line resets in input with the pull-up enabled, so that the device is maintained in a static state as
26 LCDC LCD Controller
27 DMA DMA Controller
28 Reserved
29 UHP USB Host Port
30 AIC Advanced Interrupt Controller IRQ0
31 AIC Advanced Interrupt Controller IRQ1
Table 9-1. SAM9263 Peripheral Identifiers (Continued)
Peripheral ID Peripheral Mnemonic Peripheral Name External Interrupt