Datasheet

359
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
27.9.11 PMC Master Clock Register
Name: PMC_MCKR
Address: 0xFFFFFC30
Access: Read/Write
• CSS: Master Clock Selection
• PRES: Processor Clock Prescaler
• MDIV: Master Clock Division
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
–––––– MDIV
76543210
– – – PRES CSS
CSS Clock Source Selection
0 0 Slow Clock is selected
0 1 Main Clock is selected
1 0 PLL A Clock is selected
1 1 PLL B clock is selected
PRES Processor Clock
000Selected clock
001Selected clock divided by 2
010Selected clock divided by 4
011Selected clock divided by 8
100Selected clock divided by 16
101Selected clock divided by 32
110Selected clock divided by 64
111Reserved
MDIV Master Clock Division
0 0 Master Clock is Processor Clock.
0 1 Master Clock is Processor Clock divided by 2.
1 0 Master Clock is Processor Clock divided by 4.
1 1 Reserved.